Analog Design Engineering Internship
eSilicon Corporation
Pavia, Italy
3 gg fa

Company Description

eSilicon serves the $10B+ ASIC design and manufacturing markets for system OEMs and fabless semiconductor companies. Our customers have used our products and services to create semiconductor devices for a wide range of end markets.

eSilicon offers design and manufacturing services, along with a rich portfolio of customizable memory IP, that makes us an ideal partner for creating semiconductor-based solutions no matter what the end market, no matter what the process node and no matter how fast the expected volume ramp.

eSilicon services include ASIC design and the coordination of the global, outsourced manufacturing supply chain that implements those custom integrated circuits.

We deliver the manufactured custom ICs in volume to our customers at a pre-negotiated price. We also develop memory IP and I / O products, both off the shelf and custom.

Analog Design Engineering Internship

Design and mixed-mode circuit simulation activity on building blocks for high-speed serial interface for data center applications .

The candidate will work closely with the system architects and analog and digital designers to simulate and verify the functionality and the performance of top-level blocks of a high-speed serial interface (SerDes).

The candidate will be exposed to state-of-the-art high-speed serial interface design and will help to validate the circuit functionality and benchmark it against the model to help verifying that the schematic design meets the electrical specifications defined by the system architects.

The circuits that the candidate will deal with include : continuous time linear equalizers, multi-GHz VCO, fractional PLL, ADC, DAC, band gap, voltage / current reference and temperature sensors.

Application Engineering Internship

Measurement and validation activities done in the lab on silicon devices for high-speed serial interface for data center applications .

The candidate will work closely with the system architects, analog and digital designers and firmware and hardware engineers to test the functionality and the performance of top-level blocks of a high-speed serial interface (SerDes).

The candidate will be exposed to state-of-the-art high-speed serial interface design and will help to test the circuit functionality and performance as well as automate compliance tests specific to the standard.

The candidate will use specific instrumentation and will design software to build virtual instruments that control the device under test.

This University Collaboration program is open to University students and graduates in Italy.

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